1. J. N. Cooper, R. B. Ellis, and A. B. Kahng, “Asymmetric binary covering codes," J.
Combin. Th. A, 100 (2002), 232249 (pdf).
2. F. R. K. Chung and R. B. Ellis, “A
chipfiring game and Dirichlet eigenvalues,"
Discrete Math. 257 (2002), 341355 (pdf).
3. R. B. Ellis and C. H. Yan, “Ulam's pathological liar game with one halflie," Int.
J. Math. Math. Sci. 29 (2004), 15231532 (pdf).
4. R. B. Ellis, V. Ponomarenko,
and C. H. Yan, “The RényiUlam
pathological liar game with a fixed number of lies," J. Combin. Theory Ser. A, 112 (2005), 328336 (arXiv,
pdf)
5. R. B. Ellis, X. Jia,
and C. H. Yan, “On random points in the unit disk," Random
Structures Algorithms 29 (2006), 1425 (pdf).
6. R. B. Ellis, J. L. Martin, and C. H.
Yan, “Random geometric graph diameter in the unit ball,"
Algorithmica 47 (2007), 421438 (arXiV, pdf).
The original publication is available at www.springerlink.com.
7. R. B. Ellis, “Density of constant
radius normal binary covering codes," Discrete Math., 308 (2008),
44464459 (special Simonovits issue) (arXiv pdf).
8. R. B. Ellis, V. Ponomarenko,
and C. H. Yan, “How to play the onelie RényiUlam
game," Discrete Math. 308 (2008), 58055808 (pdf).
9. R. B. Ellis and K. L. Nyman,
“Twobatch liar games on a general bounded channel," J. Combin. Theory Ser. A 116
(2009), 12531270 (pdf, slides).
10. R. B. Ellis and J. P. Ferry,
“Variance of the subgraph count for sparse ErdősRényi graphs," Discrete Appl.
Math. 158 (2010), 649658 (pdf, slides).
11.
J.
N. Cooper and R. B. Ellis, “Linearly bounded liars, adaptive covering
codes, and deterministic random walks," J. Comb. 1 (2010),
307334 (Joel Spencer special issue) (JoC, arXiv, pdf).
Refereed Conference
Proceedings
 R. B.
Ellis, A. B. Kahng, and Y. Zheng,
“Compression algorithms for dummy fill layout data," Proc.
SPIE, Vol. 5042, Design and Process Integration for Microelectronic
Manufacturing, pp. 233245, July 2003 (pdf).
 R. B.
Ellis, J. L. Martin, and C. H. Yan, “Random geometric graph
diameter in the unit disk with l_{p}metric,"
extended abstract, Lect. Notes Comput. Sc.
3383 (2005), 167172 (pdf).
 J. Bagga, R. Ellis, and D. Ferrero,
“The structure of super line graphs," in ISPAN '05:
Proceedings of the 8th International Symposium on Parallel
Architectures, Algorithms and Networks (2005), 468471.^{ }(See
IEEE
Explore for correction to author list posted on first page of
the online article, which requires a subscription to view.)
 G. Calinescu and R. B. Ellis, “Monitoring
schedules for randomly deployed sensor networks," in Proceedings
of the DIALMPOMC Joint Workshop on Foundations of Mobile Computing
(2008), pp. 312.
 J. Bagga, R. B. Ellis, and D. Ferrero,
“The spectra of super line multigraphs."
In: B.D. Acharya, G.O.H. Katona,
and J. Nešetřil, eds., Advances
in Discrete Mathematics and Applications (Proc. Int. Conf. Discrete
Math., ICDM2008, Mysore, India, 2008), to appear (pdf).
Manuscripts or Work
in Progress
 R. B. Ellis,
“Discrete Green's functions for products of regular graphs,"
manuscript (arXiv,
pdf).
 R. B. Ellis, J. P.
Ferry, D. P. Lo, and D. Mubayi, “The
blockcutpoint tree characterization of a
covering polynomial of a graph," preprint.
 R. B. Ellis,
“Optimal packings within coverings for
radius 1 adaptive block codes," in preparation.
Theses
 “Chipfiring
games with Dirichlet eigenvalues
and discrete Green's functions," Ph.D. Thesis, University of
California at San Diego, June 2002 (pdf).
 “A KruskalKatona Theorem for Cubical Complexes,"
Master's Thesis, Virginia Tech, June 1996 (ps).
Technical Reports
 Y. DeWoody,
R. Ellis, R. Klima, M. Minic,
M. Sellers, and J.M. Yuan, “Examining Randomness of Certain
Sequences,” CRSC Industrial Mathematics Modeling Workshop for
Graduate Students, Technical Report CRSCTR978, 1997.
 A. CintronArias,
N. Curet, L. Denogean,
R. Ellis, C. Gonzalez, S. Oruganti, and P. Quillen, “A Network Diversion Vulnerability
Problem,” IMA Mathematical Modeling in Industry Summer 2000
Program for Graduate Students, Technical Report 1752, February 2001 (pdf).
 R. B. Ellis, A. B. Kahng, and Y. Zheng,
“JBIG compression algorithms for `dummy fill' VLSI layout
data," Technical Report #CS20020709, UCSD CSE Department, 31pp., June 2002 (ps,
pdf).

